- Advantest ATE equipment. Lab equipment, especially high-speed oscilloscopes, Logic Analyzer, TDR and others.
- Writing test programs for DIMM testing especially experience in training development for DDR5 DIMM.
- Full product components test methodology for memory interface silicon and Module as well as system levels.
- Signal integrity and power integrity experience with HFSS, Slwave, ADS, Hspice and others. DRAM Memory interface (DDR1/2/3/4/5) analysis and improvement
- PC and Server Memory module validation on ATE Tester (Advantest/Teradyne/93K).
- System MRC(Memory Reference Code) analysis and DRAM validation on real system.
Failure analysis of Memory module, DRAMs and Buffer chips. -
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Staff Validation Engineer - Seoul, 대한민국. - Renesas Electronics
설명
Job Description
Position : Staff Validation Engineer
Work with processor-memory interfaces, focused on DDR5 topologies and protocols, as well as high-speed signaling, including signal integrity and power integrity concepts. Validation of high-speed memory buffer semiconductor products. Develop test methodologies for validating silicon designs against JEDEC and internal specifications. Develop test programs on Advantest ATE to validate DIMM performance using our silicon designs. Work with silicon design teams to develop experiments, drive data collection, and present results analysis. Support Applications Team in understanding and resolving customer issues.
JOB DESCRIPTION:
Sr. Validation Engineer. Work with processor-memory interfaces, including DDR topologies and protocols, as well as high-speed signaling, including signal integrity and power integrity concepts.
MINIMUM REQUIREMENTS:
Bachelor's degree in Electrical Engineering or a related field and 96 months of experience
SPECIAL SKILLS REQUIRED:
Experience in the following:
